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[Moved]: High Speed Addressable Line data transfer

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Risam

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Greetings,

Pls help. I have a project that i must transfer about 512kBytes data to 6 block slaves. Each block is sparated about 5 - 10meters from master module.

For transport, i plan tu use RJ-45 (UTP's) cables. And the Microcontroller, i use ESP32 chips. And i am using SPI to send the datas.

My question is, what chips should i use to split the data out lines from ESP32 since the data that send to each module is different.
In my design, i use 6 cables (utp with rj-45 socket). So i need chips that one input, 6 output, high speed and addressable.

Tnxs
 

Re: High Speed Addressable Line data transfer

You can either use separate chip select or addressing. The former needs more IO lines at the SPI master. Addressing is just a software thing, you didn't tell about the involved slave hardware.

SPI over 10 m should use differential signaling, e.g. RS-422 for noise immunity.
 

Re: High Speed Addressable Line data transfer

Hi,

With an interface you usually don't talk about kbytes of data size, but tranfer speed, like 512kbytes/s.

I recommend to use a standard hardware interface (I prefer RS422 or RS485)
and use a standard protocol. Modbus, profibus...

If you go on with SPI, then consider to use smaller blocks with CRC.

Klaus
 

Re: High Speed Addressable Line data transfer

Thankyou for your reply guys,

so sorry maybe my intro not so clear.
Herewith i upload the bloc diagrams.

I wanna drive P10 LED matrix blocs. Each blocks contain 32 x 256 pixel. Totals 6 blocks, and every block is separated about 5 - 10 M from controller board. Of course i need a bus that capable to handle minimal 512Kbps.

In my firmware, i just write string "String 1" to Block 1 panels, then write "String 2" to Block 2 panels, and so on.

After data processing, i use SPI register to transmitt datas. So, actually i not use SPI protocols completly. Just using the resgitser to sending datas.

Regarding to 6 blocks P10 Panels that i'll use, and there is only 1 SPI module that used, so i must send datas one by one. And then, i use addressable bus to connect one line input (from uC) to 6 blocks P10 Panels.

Till today, i haven't ideas, what chip i'll use. I've been thinking using 74LS259D, but notsure about its speed.

Need advice, please.

BlockDiagram.jpg
 

Hi,

I wanna drive P10 LED matrix blocs
I don't know what a "P10 LED matrix" - and I don't have to.
But you should know.
Especially what interface they use and what protocol...

I think this is the most important thing, because you can't change it - you need to comply with it.

--> If they use SPI, then (you have to) use SPI at the microcontroller side, too.
For sure you are free to build a "bridge" between different interfaces.
*****
After data processing, i use SPI register to transmitt datas. So, actually i not use SPI protocols completly. Just using the resgitser to sending datas.
SPI is no protocol...it's just a synchronous serial shift of data. Usually in multiples of 8 bits.
Are you sure you know how SPI works?
MOSI, MISO, SCK, SS .... usually are the signals you need for an SPI interface.
For one way communication you may omit MISO, but with your application I recommend to use some feedback.

Imagine: you transfer a block of 1024 bytes = 8192 bits. If there is a erroneous SCK signal in the first transmitted bits, then all following bits result in wrongly received data.

With UART ... there is only one (or two) bytes of the 1024 bytes wrong. (There may be exceptions)

BTW. What microcontroller do you use?

Klaus
 

Thankyou KlausST.

Well, actually P10 LED matrix is "only" a board, with 16 x 32 of LED driven by some 74LS595D.

For data present, it is ok, Guys. No problem. I have some work with this panels before and it is OK.

And now, my concern is, i have problem to expands my bus data. All my project yasterday is Point to point. One uC, driving 1 panels. It is OK.

And last project, i use 6 bloks panels. So i need spliting bus data to 6 groups. It is unaable to tie it all together, due to P10 led was not addressable.

I use microcontroller ESP32-0DW from Expressif. Its integrated with BLE module and WIFi modul. It is 32Bits ARM uC.
 

Hi,

MOSI, MISO, SCK .. each of them needs to be differential.
You may use them 6x individualy point to point.

Or you may use them as a bus "in a line" with one beginning and one end. No star connection.

SS signal needs to be individually in either case. It may be single ended, but it needs ESD protection and LP filtering at the receiver side.
If you don't want to use individual port pins you may use a HC138 or similar device.

Draw a draft of your signals and wiring scheme.

Klaus
 

Mentioning that SPI slaves are P10 LED modules is important information. P10 isn't exactly SPI, but quite similar.
It means:
- the slaves have no built-in intelligence to handle addressing
- LEDs are multiplexed though the P10 interface, data must be continuously refreshed with > 30 Hz to avoid flickering

256*32*6 * 30 Hz results in 1.5 Mbit/s data rate. Most available LED controller cards are using FPGA to handle the module interface and generate the data stream. I guess ESP32 can be able to operate 6 SPI slaves sequentially with a sufficient high SPI clock rate. Individual module write enables must be generated.

P10 has 2 mux select lines A and B, clock and serial data in, output and latch enable, in total 6 signals that must be wired to each module. It makes sense to use a piece of logic at each module chain input to generate some of the signals locally.

- - - Updated - - -

For those not familiar with LED Modules, see below a simplified P10 module schematic. Part of the 595 shift registers and LEDs is omitted. Total matrix size is 128x4 (usually organized as 32x16). Modules are chained through in- and out connectors.

P10.png
 

FvM, great.. It is what i was talking. :)

Yes.

I want to use 1 spi module, and then, i want to expand MOSI bus as R-Data P10, and of course SCLK to.

What chip should i use to handle this problem?

Chip requirement is:
1. Can opearete at 1.5mpbs data speeed.
2. One Input, 6 output with selectable line (addresable output).
3. Operrate in 3.3V.

Your advices please.

Tnx
 

I think the function can be achieved by inserting a shift register in front of the first module and decoding the output to generate A, B and addressing information. SCLK has to be delayed and gated according to the addressing state.

A small PLD can do it in a single chip, otherwise use multiple HCMOS ICs. If designed right, the logic can work with three SPI signals, SCK, MOSI and SS.
 

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