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Quartus Cyclone V: How to create a trigger signal for 128 bits counter data?

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AbinayaSivam

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Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?

Hi,

Working in Altera Quartus. Can anyone share the logic for how to create a verilog/VHDL code for generating a trigger signal like pulse signal, etc for 128 bits counter data.
 

Re: Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?

What exactly do you mean? a pulse signal and a counter are two different things? How do you want them to interact?
What have you coded yourself? and what problems are you having?
 

Re: Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?

I think the OP wants to have an enable signal, which he calls "pulse signal". A high on this signal will trigger counting of a 128 bits counter.

If my speculation is correct, then show us what you have done.
There are 100s of counter code floating in the net. Pick one and play around with it.
Then come back if you have questions.
 

Re: Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?

Do you realise that a 128 bit counter, even at a fast 400 MHz, would take longer than the age of the universe to wrap? do you really want a 128 bit counter?
 

Re: Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?

TrickyDicky said:
Do you realise that a 128 bit counter, even at a fast 400 MHz, would take longer than the age of the universe to wrap? do you really want a 128 bit counter?
Click to expand...

This is probably a nonce for some crypto-mining thing. Although you are correct.
 

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