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Substrate Loss and Resistivity of TSMC's 65nm Process

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Hamed94

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Hi all,

I want to design and simulate passive components for TSMC's 65nm process. I have its substrate information, e.g. thickness and resistivity of the different metal layers, thickness and relative permittivity of the different dielectric layers and so on.

However, I didn't find substrate resistivity and loss, i.e. tanδ, of different dielectric layers.
How can I find these parameters?
Do you know any dissertations or Theses that can help me?

Thanks in advance
 

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