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problem with floating point ip core xilinx

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jalal.baba

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Hi
I am facing problem with floating point 5.0v core generator.
I want convert float to fix and my configuration is:
floating-point precision : single (32bit)
fix-point precision :int32(32bit)
my code is:
HTML:
module top(x);
reg clk;
output [31:0] x;
real a;
initial
	begin
	clk=1'b0;
	forever #30 clk=~clk;
	#600 $stop;
	end
initial 
begin
 a=0.9
end
  
	float f2 (
  .a(a), // input [31 : 0] a
  .clk(clk), // input clk
  .result(x) // output [31 : 0] result
);

endmodule

INPUT: 0.9
actual(sim) result:0100000000000000000000000000
expectative result:00111111011001100110011001100110
Capture1.JPG
 

what exist ways for convert real to ieee754?
for example i have float number=0.9 , how i must to define my float number which i to be able use IEEE754?
 

Real is an abstract data format only used in simulation and for parameters and constants calculated at synthesis time.
Conversion function to_float() from real to float is e.g. provided in IEEE float package. I'm not familiar with Xilinx tools and float IP, I don't know if they provide specific conversion functions for constants, but IEEE package should do the trick.
 
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