Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What are the pros and cons of using logic elements to implement FPGA memory blocks?

Status
Not open for further replies.

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
593
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,681
FPGAs contain memory blocks inside the logic fabric. However, it is also possible to implement a memory block using the device logic itself. It is better to use the built in "hard" memory blocks as they are carved for specific purpose, however I assume that sometimes hard logic may not meet our requirement. Therefore, why would one need to use device logic to implement "soft" memory block (other than having use all the hard memory blocks) and what are the pros and cons of this approach?
 

LUTRAM (or soft memory block as you call it) is good for small memories, where it would be inefficient to use a BRAM/MRAM/M20k or whatever the manufacturer has on it's specific device. It can usually also be unregistered, and the fitter is freeer to spread it around, which may make some routing shorter.

BRAM is good for larger memories, as they would use far too many logic elements.

The Synthesis tool is usually best deciding what type of ram to use.
 

Actually there is a slight confusion on what constitutes "small" and at what point it is not small anymore. Certainly it is down to judgement based on experience.

I had a problem where data comes in as colum of 8 words, 22 bits each. I store 8 of these columns so I have a parallel in shift register which stores 8 of these columns. Then, I shift out ONE 22 bit word a time from the first column shifted in. It will make sense if I provide a diagram but basically, I could only implement this as a shift register using logic elements. There was no way to use hard memory blocks (can't have a 8*22 bits input shift register anywya) in this case and thus I wondered what the pros and cons are.
 

Basically BRAMs are a fixed size. For xilinx thats 18kbits (in configurations 1bit x16k, 2x8k, 4x4k, 8/9 x 2k, 16/18 x 1k and 36x512). If you use it in a format ouside of these setups, you are being inefficient. Eg, you had a 8bit word over 512 address locations (9 bit address). only 25% of the ram would be used, and 75% wasted. The synth tools can be clever and combine inferred memories together if it sees you have two "rams" using the same address. But yes, you need a basic understanding of memory architecture to avoid these losses.

LUTRAM is much smaller, so is more flexible.

RAM can be used for large shift registers, but not if you need internal taps. But in your example it seems far too small to need RAMs.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top