Instrument Amp with ADA4817

Hi all

I have designed an IN AMP using LT Spice and the ADA4817 opamp model, but I am not getting results as expected. See the circuit and results below.





My question is: Why can't the signal swing to to negative rail?

Here is the datasheet for your reference :
https://www.analog.com/media/en/technical-documentation/data-sheets/ada4817-1_4817-2.pdf

The differential input range is meant to be +/-Vs isn't it? I would expect to be able to swing between +/-5V.

Is it a quirk of LTSpice?

However,on page 19 this statement confuses me : "The innovative high speed FET input stage handles common-mode signals from the negative supply to within 2.7 V of the positive rail."

Any help would be appreciated.

I am trying to design a +/-5V differential input with extremely high input impedance.

Thanks

S

You see the limited common mode range of U2, well corresponding to the datasheet specification. You'll notice clipping of positive voltage shows inverted at the output due to inverted U4 operation. ADA4817 isn't able to buffer +/- 5V.

Hi FvM

Thanks for that.

If the positive rail is +5V, shouldn’t the common mode range be +2.3V?

Shouldn’t this allow me to swing +4.6V from ground?

I must be missing something :-(

- - - Updated - - -

I might just be missing the obvious here.

What ever is present on in+ on U2 is also on in-, so the common mode voltage is whatever is present on in+...

This means the signal (positive half cycle) will clip at 5V-2.7V

But it shows on the negative half after U4.

Is that right?

Thanks

Everything is as expectable.

This graphical view might help you.

Hi,

The whole circuit is not designed very well.
U3 is as useless as can be. There is not a single benefit, but a lot of drawbacks:
* engineering time
* cost
* complexity
* power consuming
* increased impedance
* increased errors like offset voltage and noise

Klaus

Hi Klaus

Appreciate your comments.

The circuit does look ridiculous with U3 grounded, but this isn’t the entire circuit and I need a very high Input impedance differential measurement. In reality the circuit will measure the voltage drop across an unknown device and must have an extremely high Input impedance.

Offset will be compensated for further down the signal chain with a number of DACs as the signal chain will contain a number of x1 / x10 and one x1 / x3 / x10 gain stages.

Cost isn’t a big issue to me in this project and not is power consumption.

I do agree, U3 looks pointless but trust me it is necessary

- - - Updated - - -

Thank you CataM, it is as I thought.

LTSpice clips it at 2.4V (I think, well I read 2.4V anyway!) so I was getting confused as to where that figure came from.

Hi,

but this isn’t the entire circuit and I need a very high Input impedance differential measurement. In reality the circuit will measure the voltage drop across an unknown device and must have an extremely high Input impedance.

Click to expand...

Then U3 makes sense.

Klaus

Thanks Klaus

I may experiment with other op amps but I really like the bandwidth on this ADA4817 as well as the Input impedance. I need really flat performance up to 70MHz at the front end, the signal will then be down mixed to a much lower frequency.

The resistors in this circuit will be hand picked and matched to improve CMRR and I will have to AC couple on the “ref” pin through a low resistance reed relay or similar as I don’t want to reduce the Input impedance.

I know this won’t be cheap, but I am trying to achieve high end performance.

“Trying” being the key word!

The common mode issue was an oversight but I can work with it, I feel a little silly now.

Thanks to everyone

S

Hi,

high frequency and high impedance usually don´t match easily.

Flat performance up to 70MHz...let´s say with an input impedance of 1kOhm (which isn´t very high ohmic) ... means you need to keep capacitance lower than 2.3pF. Hard to achieve.
Maybe the OPAMP input is good enough, but every piece of trace will add capacitance. Connectors even more, wiring is unpredictable (don´t touch it) ...

Not a simple task.

Klaus

Hi Klaus

Indeed, this is going to be a nightmare.

I will be using every trick in the book to reduce input capacitance. Possibly Guarding, PCB cutouts etc - I am not at that stage yet.

I do not need extremely high impedance across the entire frequency range, but at frequencies below 1MHz it is very important.