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Fly back LTspice simulation

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satiz

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Hi,

I am planning to simulate flyback design in LTspice, but the output is not coming as expected. Please help me to solve this.
Actual Smps design as per the PI expert
5A.png
LTspice
ltspice7v.png

Thanks in advance
 

Simplify the circuit down to the lowest parts count.
* Feed it a DC supply.
* Disconnect the DCR snubbing network (for the time being).
* Attach a lone resist or to the secondary.

After adjusting everything properly, you should see the secondary produce current only during the second half of the cycle when no current is in the primary.

Later you can add the snubber, the output components, etc.
 

Hi,

it's working now... Wrong value entered in primary inductance. After correcting it's working.
I have one more doubt, why my output is having spike kind of thing.

Attached is simulation output

output.png
 

why my output is having spike kind of thing.
That is the output across the output cap ? It might be because you are using a non ideal, high ESR,ESL electrolytic cap. You need ceramic cap in parallel with the output cap.

Why are you driving M1 with 30 V ?
 

We call it oscillation rather than "spike". To see how it's brought up, inspect more circuit voltages and currents.

You see heavy oscillating flyback current, probably unrealistic high leakage inductance.
There are some hidden component parameters, e.g. output capacitor ESR. You apparently have some 10 mOhm ESR.

Besides too high gate driver voltage (would damage a real MOSFET), you have two circuit faults:
- ground connection of input voltage is shorting a rectifier
- DCR diode has insufficient voltage rating
 

Agree, your waveform looks more like what I would expect from the secondary current shape, with some ringing caused by leakage inductance resonating with primary device/diode capacitance.

You can also see the effect of snubbing over the rectifier diode.
 

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  • sec_I_ideal.png
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