Large voltage spikes during transitions of common emitter circuit

Hello all,

I'm working of a very simple transistor circuit. The basic idea here is I'm going to be taking a signal from a comparator that will have a high voltage of +19v and a low voltage of -24v and I want to translate this to +3.3v and 0v. I also need it to be an open collector output.

The circuit I came up with is shown below. The transistor I'm using is a mmbt6428lt1g. I've use the spice model provided by ON Semiconductor in this simulation.


With this simulation I'm seeing spikes on the output during the transitions. See below.



I'm not exactly sure why this is happening. My guess is that it has something to do with the base voltage going above 3.3v or below 0v before the transistor completely turns on or off. But I have very little experience with transistor circuits so I'm not sure.

What could be causing this and what would be the way to prevent it?

Any advice or idea is greatly appreciated!

Thank you!

Hi,

My guess is that it has something to do with the base voltage going above 3.3v or below 0v

Click to expand...

The base voltage goes above 3.3V? Are you sure?

But I agree that it may cause probkem when base voltage goes below 0V.
Use a fast signal diode to prevent the base voltage to go below 0V.

Additionally I recommend to adjust resistor values. Either make the output less ohmic or the input higher ohmic.

****
May I ask why you used a transistor?
A diode - resistor - resistor network should work.

Klaus

The base voltage goes above 3.3V? Are you sure?

Click to expand...

You're correct, I was failing to think about the transistor turning on. It goes to about 0.7v which makes sense because once the transistor starts pulling current it will drop across the series resistor.

But I agree that it may cause probkem when base voltage goes below 0V.
Use a fast signal diode to prevent the base voltage to go below 0V.

Additionally I recommend to adjust resistor values. Either make the output less ohmic or the input higher ohmic.

Click to expand...

Adding a diode at the base solves the negative going spikes. I also increased the series base resistor to 100k which seems to help with that.

I'm still seeing the spikes when the output transitions from high to low. Since the base is not going above 3.3v it seems like something else must be causing these spikes. Could it be higher frequencies generated during the transition coupling between the base and the collector?

May I ask why you used a transistor?
A diode - resistor - resistor network should work.

Click to expand...

I chose a transistor just because the output should be open collector and I wasn't sure how to do that with anything else.

In regards to using a diode/resistor network. I'm not exactly sure what this would look like. Is it essentially a series diode to block the negative voltages and then a resistor divider to take +19v input to 3.3v output?

Hi,

In regards to using a diode/resistor network. I'm not exactly sure what this would look like. Is it essentially a series diode to block the negative voltages and then a resistor divider to take +19v input to 3.3v output?

Click to expand...

Yes. But -as you said - it is no open collector output.

Klaus

Both spikes in the original circuit are caused by capacitive coupling through Ccb.

Clamping negative base voltages is one of many ways to reduce this crosstalk, depending on the circuit purpose you can also slow down the input rise and fall time by a filter capacitor.

Level shifter based on resistor network. This assumes you have access to +3.3v supply and 0v ground.

I would say OP needs to add emitter-base reverse diode, because the -24V zeners that junction otherwise.

I would say OP needs to add emitter-base reverse diode, because the -24V zeners that junction otherwise

Click to expand...

Or by adjusting the resistor divider properly.

@FvM Ok, that's what I was starting to think. I simulated clamping to ground and this did remove the negative going spike. I think I understand the basic idea here but I'm a little confused. From your description the problem arises by the high frequencies coupling through the base to the collector of the transistor. So how does clamping stop this? It seems like the high frequency edge is still there it just can't go very negative anymore. I'm not claiming you're wrong. The simulation agrees with you but something about it is unclear to me.

Also, is there an easy way to remove the positive going spike? The base voltage doesn't get near 3.3v so putting a series diode to 3.3v doesn't seem like it would do anything here.

@BradtheRad Thank you for that idea. I don't know if there's an easy way to get the values needed for this but I did my circuits 101 analysis and eventually the needed values. Unfortunately there are a variable number of pull ups on this output so I don't think I can use it. But it was interesting because I thought about how to solve this problem but never came up with this.

@prairiedog This is essentially what I did after FvM's recommendation. It seems to work except that I still get the positive going spike.

It should remove the spike with either capacitor or fast diode between base and emitter.

I think the base is way overdriven (you need only
about 160uA collector current to bury the load,
but are throwing about +/-1mA at the base).

Look at the transition times on the input source.
I think the dV/dt there may be blowing through
the Cjc and bumping the output. You might add
some shunt C, base to emitter, to help soak up
any overly fast input transitions (with 3.3V logic
and a 20K pullup it's not like you're going to be
caring about RF). But I'd begin with assessing
input stimulus sanity.

Input divider network should ensure that the
reverse voltage applied in the -24V case will
not exceed the reverse Vbe rating of the
transistor. You could knock R10 down to 1-2K
and still work fine. I'd also lower the collector
pullup if you care at all about LH prop delay
or prop delay symmetry, especially if there is
any length of routing or this circuitry feeds
anything with much input capacitance.

For that matter I might think about a "single
gate logic" Schmitt trigger chip in a 3.3V compatible
family, if you can find one. Probably no bigger,
symmetric and controlled drive, likely faster and
no 160uA low-output-state current draw.

Fast base voltage step in combination with high load impedance brings up a certain Ccb cross talk in any case. Obviously reducing the base voltage swing reduces the charge injection, incteasing the base voltage rise time doesn't reduce the cross talk charge but at least the spike magnitude.

I feel that the discussion is somehow bloodless by assuming ideal switching behavior on one hand but not referring to an actual circuit application. Why do you worry about "voltage spikes" at all?