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[SOLVED] Where to get information to design endcap cell

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Anklon

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I'm currently doing an university project to design a chip. We are creating our own standard cell library for that purpose. I need some information/ direction to design end-cap cells.

I know what is end-cap cell is. But I don't know where to look for proper rule information to design them ( like width or height for cells for a particular technology ).

I googled it for hours, but most of the time come up with the definition rather then detail design information. my design rule document file do not contain any information about well tie-off errors.

Any resource or link would be appreciated. Thanks for your time. :)
 

I'm currently doing an university project to design a chip. We are creating our own standard cell library for that purpose. I need some information/ direction to design end-cap cells.

I know what is end-cap cell is. But I don't know where to look for proper rule information to design them ( like width or height for cells for a particular technology ).

I googled it for hours, but most of the time come up with the definition rather then detail design information. my design rule document file do not contain any information about well tie-off errors.

Any resource or link would be appreciated. Thanks for your time. :)

You sound very very lost. The endcap cell should be as tall as the other cells in the library for obvious reasons. As to how to design it, you need to look at the DRM for the well rules. It's very simple. Along the lines of end the well x nanometers away from any contact, etc. I assure you that your DRM has all the info you need to design an endcap cell.
 
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    Anklon

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Thanks for your information.
I'm little bit of confused for Vertical end cap cell though. As they will cover the whole top and bottom row, should they have to be same height as standard cell or I can reduce them only considering DRC violations?
 

Thanks for your information.
I'm little bit of confused for Vertical end cap cell though. As they will cover the whole top and bottom row, should they have to be same height as standard cell or I can reduce them only considering DRC violations?

has to be same height. dealing with multiple height cells in physical synthesis is never desirable.
 
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    Anklon

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Thanks for your information.
I'm little bit of confused for Vertical end cap cell though. As they will cover the whole top and bottom row, should they have to be same height as standard cell or I can reduce them only considering DRC violations?

Endcaps generally refer to the ends of horizontal logic tiers. If you need something across the top and bottom to fix DRC errors then create a cell that stretches the length of you logic block only wide enough as needed.
 

Endcaps generally refer to the ends of horizontal logic tiers. If you need something across the top and bottom to fix DRC errors then create a cell that stretches the length of you logic block only wide enough as needed.

this is not good advice, this level of customisation is not possible. tbcaps (endcaps that serve top and bottom) should be as tall as all other cells in the library.

also be aware that tbcaps and endcaps are not there for drc reasons alone, they are there for timing reasons. you want to make sure all cells in your chip were characterized for the same well dimensions. you can't achieve that if the edges of your core area don't have termination cells that are identical to each other.
 
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    Anklon

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