Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

MOSFET pull down in linear region

Status
Not open for further replies.

matt11

Newbie level 4
Joined
Jun 22, 2012
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,362
I have a current sense IC powered directly from a battery. I want the current sense IC to be in the shutdown state when the 3.3V power supply is disabled.

I have added a dual N channel MOSFET circuit (see attachments) to achieve a pull down on the shut down pin (active low and internally pulled high) when the
3.3V supply is not present. The circuit seems to work in LTspice but I am concerned about one of the MOSFETS operating in the linear region. (VDS < VGS - VT)

Is it safe to operate the MOSFET in this configuration or is there anything I'm missing that is considered bad design?
 

Attachments

  • 1.png
    1.png
    18.6 KB · Views: 55
  • 2.png
    2.png
    20.4 KB · Views: 60

I would be cautious with it if the 3.3V is diabled the gate of M2 doesn't float. I would add a discharging resistor between the gate and source of M2. Or use bipolar transistor. Otherwise linear operation has no any problem of MOSFET, it should be OK.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top