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How to do QRC extraction

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Bhanu_Pratap

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I am very new to layout in cadence. I have made layout. I did DRC check and LVS check. Both works good. But i dont know how to do ERC check. On internet i found out that mostly people do DRC check ...... Are both of them different. Please help.
 

ERC has nothing in common with QRC extraction.

The Electrical Rules Check searches for possible violations of electric rules, like forbidden short circuits of outputs, exceeded output fan-out or current, open or floating nets.

QRC extraction extracts resistive (if selected) and capacitive parasitics from layout.
 
erikl said:
ERC has nothing in common with QRC extraction.

The Electrical Rules Check searches for possible violations of electric rules, like forbidden short circuits of outputs, exceeded output fan-out or current, open or floating nets.

QRC extraction extracts resistive (if selected) and capacitive parasitics from layout.
Click to expand...

On top of that, QRC is a tool while ERC is a check. OP seems to have confused things quite a bit.
 
Quite often, ERC includes some checks - such as resistance (between two devices, or pad to ESD device, or driver to receiver) - for which extracted post-layout netlist is required, so there is a link between ERC and extraction tools.
Tools performing ERC may be using their own extraction engine, or may use extraction results from other tools.
 
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