Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What determines the number of rows in an SDRAM?

Status
Not open for further replies.

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
593
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,681
SDRAM is divided into banks, each bank into rows and each row into columns. What determines how many rows will be there in an SDRAM?
Is there a formula used to go from a single memory location address to generate three addresses of bank, row and column?
 

So it is an arbitrary choice of the SDRAM designers? I see.
 

But if you can access memory locations using linear addressing, then internal organisation may not matter for your application.
 

But if you can access memory locations using linear addressing, then internal organisation may not matter for your application.

It can be very important. DRAM can be very slow when switching from row to row. But reading across banks and within a row incurs little/no turnaround penalty. So if you can, it is best to design your logic with this knowledge.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top