analogTechie
Junior Member level 1
Greetings and a Happy 2018 New Year !!
Could anyone please shed some light on the "VTA adder" methodology for simulating the process variation dependence of analog CMOS circuits ? Also, are there any good references on this topic ? Thanks !
Could anyone please shed some light on the "VTA adder" methodology for simulating the process variation dependence of analog CMOS circuits ? Also, are there any good references on this topic ? Thanks !