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Why capacitor is discharging quickly

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xmen_xwk

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I want to create a circuit where a capacitor charges quickly and discharges slowly. So I thought to place 2 resistors, charging with lower resitance and discharging with higher resistance. It should have work. But when I tested in ltspice, its result was different.

Prob.png

Why its ignoring 150K resistor?
 

That looks right to me.
When the pulse is low, the transistor is not conducting so the capacitor quickly charges to 12V through R1.
During the pulse period, the transistor turns fully on and the voltage across the capacitor will drop due to the potential divider of R1 and R3 plus a residual C-E voltage in the transistor.

Pulse low = 12V
Pulse high = 11.921V + the transistor's CE voltage.

If you were expecting more of a sawtooth 'ramp' you have to disconnect the 12V during the discharge period.

Brian.
 

betwixt said:
That looks right to me.
When the pulse is low, the transistor is not conducting so the capacitor quickly charges to 12V through R1.
During the pulse period, the transistor turns fully on and the voltage across the capacitor will drop due to the potential divider of R1 and R3 plus a residual C-E voltage in the transistor.

Pulse low = 12V
Pulse high = 11.921V + the transistor's CE voltage.

If you were expecting more of a sawtooth 'ramp' you have to disconnect the 12V during the discharge period.

Brian.
Click to expand...

Shouldn't it discharge slowly when transistor turns on ?
 

I too agree with Brian.

I think connecting a PNP transistor between R1 and 12V supply, which is driven by the same pulse, will help you out in achieving slower discharge.
 

I'm kind of confuse. Where did the capacitor charge go ? There is 150k resistor between npn.
 

True, but the vast majority of current is still flowing through the 1K resistor instead of from the capacitor.

Brian.
 
The voltage divider action of the two resistors cause the capacitor to barely discharge. You want a PNP transistor to powerfully charge the capacitor quickly through the 1k resistor so that the 150k resistor can slowly discharge it when the transistor is turned off.
 

The charge and discharge time constant is defined by the resistor parallel circuit connected to the capacitor. It's about 10 ms in your circuit.

The specific thing is that you don't finish discharge which would go down by about 80 mV, but you stop after 10 mV by stopping discharge after 10 % of the time constant.

To realize different charge and discharge time constants, you need to connect the switch transistor to the lowest rather than the highest resistor, as already suggested by Audioguru. The small discharge time makes no sense either.
 

Hi,

I personally would go with a sawtooth generator-style circuit, unless I were restricted to the components in your schematic. Replacing the 1k with a current source, even a shoddy two PNP one would suffice. Perhaps the above suggestions of using a PNP instead of an NPN would complete it. You need |\ shape and not /| from what I understand, there are some sawtooth circuits in the rar file to do that - you may need to level shift them though to reach ground, which can be done with a buffer.

The rar file has an assortment of waveshaping documents you might not have seen, I hope they can add something to your idea to complete it.

View attachment Wave Shaping and Filters sawtooth.rar
 

Hi again xmen_xwk,

This probably isn't what you had in mind, but the preliminary simulation shows promising results by applying a long off time to the PNP "pass" transistor. I'd follow it with an op amp buffer/follower, it didn't affect the rise and discharge time much in a simulation at least, the op amp just make the charge time a little slower but had no effect on discharge.

The same circuit gave a horrible sawtooth/discharge slope with a 50/50 squarewave, only going down to about 7V or something and with a long, flat peak. So, maybe in your circuit just modifying the pulse signal would suffice.

sawtooth capacitor discharge.JPG
 

It is NOT ignoring the 150k resistor - LOOK at the volt scale on the left - the voltage is dropping only a tiny amount < 0.01 volt...!!! - as you would expect for a 150k discharge resistor

make it 150 OHM and then see what happens...!
 

Let's all back up here a minute; OP what are you really trying to accomplish? The fundamental problem here is in the OPs statement "charging with lower resitance and discharging with higher resistance". What you are actually doing is charging with a lower resistance CONTINUOUSLY and discharging with a higher resistance for a teeny-tiny amount of time. Are you actually trying to generate a sawtooth? Just using RCs won't work, you'll get exponential edges. And you don't need two PNPs for a 'shoddy' constant-current source; you can make a very nice one with one PNP.
 

barry said:
Let's all back up here a minute; OP what are you really trying to accomplish? The fundamental problem here is in the OPs statement "charging with lower resitance and discharging with higher resistance". What you are actually doing is charging with a lower resistance CONTINUOUSLY and discharging with a higher resistance for a teeny-tiny amount of time. Are you actually trying to generate a sawtooth? Just using RCs won't work, you'll get exponential edges. And you don't need two PNPs for a 'shoddy' constant-current source; you can make a very nice one with one PNP.
Click to expand...

What I'm trying is to control the output of a comparator, usually they are open drain, so it needs a pull up resistor for output. Now what I want is, when comparator is OFF its output will be pulled high, so capacitor should charge fast, but when comparator is ON, then it should slowly discharge the capacitor, making the output look like this.

want.png

for quick test I used NPN as its what comparator is doing.
 

Ah I made a mistake, I didnt read the voltages carefully at left side, its 11.99 min. I thought it was 0V. Oopps.
 

Hi,

I tried to do something similar to your drawing of what you're aiming for. One has no load, the second has a 10k load, both are on 100Hz with a 50/50 duty cycle. Since I don't know the maths behind it, I just go changing the capacitor value and the current sink resistor value until the simulation shows what is intended. From what I see, changing those two components based on frequency and load, and selecting the squarewave duty cycle, you can do a lot with that circuit for your intentions.

sawtooth 2 no load.JPG

sawtooth 2 10k load.JPG
 

Hi again,

This one uses NPN instead of PNP so the signals aren't inverted, and the graphs are easier to interpret. Graphs are for no load and 10k load versions. The only thing I don't like is the ~150mA spikes.

a sawtooth 3 npn.JPG
 

Hi,

Last of the photo album spot the difference uploads of the same schematic over and over. I changed a couple of resistor values and got the current spike down to ~30mA, start-up spike looks to be ~50mA. Attached are no load, 1M load , 10k load + 150n and 10k load + 220n. As what this is to be fed into (the load) is unknown, I stuck to 10k as lower reduces the output pulse considerably (about 6 to 7V max...).

sawtooth 4 npn lower current spike no load 1M load.JPG

sawtooth 4 npn lower current spike 10k load.JPG

- - - Updated - - -

Hi,

Last of the photo album spot the difference uploads of the same schematic over and over. I changed a couple of resistor values and got the current spike down to ~30mA, start-up spike looks to be ~50mA. Attached are no load, 1M load , 10k load + 150n and 10k load + 220n. As what this is to be fed into (the load) is unknown, I stuck to 10k as lower reduces the output pulse considerably (about 6 to 7V max...).

sawtooth 4 npn lower current spike no load 1M load.JPG

sawtooth 4 npn lower current spike 10k load.JPG
 
Hi,

Only later did I see the word comparator in your description, sorry about that... Maybe someone more experienced can think of a simpler solution; I tried a few things with an open drain comparator and the only design I got to work requires an additional NPN,so maybe it's no use to you. I had to use a 5V comparator in the simulation as I haven't found any others that I'm familiar with such as the 339, same difference, just a matter of voltage used.

I think, and I might be wrong, a problem with the original idea of yours may be that when the comparator is on (i.e. draining) then it is also going to drain the capacitor quickly, so the slowly discharging capacitor needs to be isolated from that with an additional component so as to drain in its own time and not pulled down by the comparator sinking anything in its path.

Not sure what you're connecting the comparator to, but with this latest circuit, I'd buffer it with a voltage follower, in the simulation it only raises the lowest voltage to ~50mV rather than a solid 0V without a buffer.

a sawtooth ie falling edge with a comparator.JPG
 
d123 said:
Hi,

Only later did I see the word comparator in your description, sorry about that... Maybe someone more experienced can think of a simpler solution; I tried a few things with an open drain comparator and the only design I got to work requires an additional NPN,so maybe it's no use to you. I had to use a 5V comparator in the simulation as I haven't found any others that I'm familiar with such as the 339, same difference, just a matter of voltage used.

I think, and I might be wrong, a problem with the original idea of yours may be that when the comparator is on (i.e. draining) then it is also going to drain the capacitor quickly, so the slowly discharging capacitor needs to be isolated from that with an additional component so as to drain in its own time and not pulled down by the comparator sinking anything in its path.

Not sure what you're connecting the comparator to, but with this latest circuit, I'd buffer it with a voltage follower, in the simulation it only raises the lowest voltage to ~50mV rather than a solid 0V without a buffer.

View attachment 143737
Click to expand...

Actually, thank you for all these schematics. The last one is what I wanted.

Have a nice day :thumbsup:
 

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