[SOLVED] JFET VGS (off) test-board-minimum VDS needed question

JFET VGS(off) test board minimum VDS needed question

Hi,

I have some JFETs and would like to check VGS(off) on some to find roughly what it is on them to avoid those surprises of ...it could be -1.7V, it could be -2.9V... but you don't know until it's soldered on the board - not helpful.

I want to use a homemade test set-up following the Glossary of JFET Measurement Parameters AN-6608 method on page 2 of the app note. This one in the image below, also the datasheet bit about VGS(off) for the xxxx5457 FET is there:



It says 15VDS and 10nA on the datasheet. I haven't a hope of making a 700M resistor to get 10nA from a 7V or if pushed 15V supply, so 5M trimpot or 10M fixed will have to do. Off to a bad start.

I can use a 15V power supply, but would like to use a ~7V supply for VDS and to power a 7660 charge pump inverter into a trimpot into tthe gate to make sure I can get the -0.5V to -6V it says on the datasheet. I'm guessing if a graph says -1.8V typical VGS(off) neither -0.5V nor -6V is likely. Or are JFETs that come in one lot/batch that "bad"/unpredictable?

Main question: Can a 7V supply be used to get a reasonable idea of what VGS(off)s I have in the section of reel I bought, or does VDS have some effect on VGS(off)?

I want to know because the simulation program 2N5457 model seems pretty identical to the physical component MMBF5457. So far, the first three I used in real circuits were ~-2.9V and the fourth was ~-1.7V. Pretty desperate to design some simple circuits without unpleasant surprises like that again. e.g. I want to make one and try to find two that are -1.7VGS(off), hopefully.

By-the-by, I found this online: SOT6 and SOT23 through-hole test board adapter. it looks good, but can't get one right now. Added link in case it's of use to anyone else or you know of a similar (and ideally cheaper) SMD version.

Thanks.

Re: JFET VGS(off) test board minimum VDS needed question

Vgs off for that device is a lot worse than you think: data sheet says -0.5 to -6.0. This is why we use feedback.

Re: JFET VGS(off) test board minimum VDS needed question

Id=10 nA and Vds=15V are nominal conditions. You'll find however that Vgs for 1uA and 1V aren't much different. Just apply the idealized quadratic characteristic.

Re: JFET VGS(off) test board minimum VDS needed question

Hi Barry,

I know. I looked at biasing techniques: constant voltage, constent current and self biasing. They all look good for certain applications but when I did the maths it seemed I could expect about 400 or 800uA difference. I don't remember the exact figure because I did the sums about a month ago, might have been a shift from 800uA to 1.2mA - that would be inappropriate for what I want to do because I want the JFET to be gate biased from ground because biasing it from a variable V+ wouldn't work as the numbers showed.

Hi FVM,

Thanks, again. Sorry, what do you mean by "idealized quadratic characteristic"? Is that the curve drawn in the graphs relating VGS to IDS? How would I apply that, please? Does using a linear trimpot to vary VGS affect getting a reasonable approximation of the VGS of each device?

Re: JFET VGS(off) test board minimum VDS needed question

Idealized quadratic characteristics are discussed in analog circuit design text books. Some equations from an old Siliconix data book:

Is that the curve drawn in the graphs relating VGS to IDS?

Click to expand...

Yes, one of it.