PNP turn-off circuit for SMPS FET

Hello,
Fig43, pg 22 of the following PFC app note has a PNP (U3) turn off circuit for the boost fet M1.
Do you agree that the 27R resistor in this circuit is incorrect, since a gate drive current of >200mA could end up resulting in the abs max Vbe of the PNP being exceeded?
Also, its certainly interesting to see the 4R7 resistor in the emitter of the PNP U3. Is this placed so as to speed up the gate discharge of M1? Presumably, the tying of the PNP (U3) collector to the sub-circuit common rail means the PNP can switch on faster?

(When I was at a major TV manufacturer, they had a 1k base resistor in the turn-off PNP, and a 10R in the collector of the turn-off PNP, but no resistor in the emitter of it….and certainly no resistor in series with the diode that goes across the BE of the PNP.)
I would like to review the maximum base current of the MMBT2907 before avoiding a base resistor for it. Do you agree :???:

PFC App note:
https://www.fairchildsemi.com/application-notes/AN/AN-9738.pdf

Do you agree that the 27R resistor in this circuit is incorrect, since a gate drive current of >200mA could end up resulting in the abs max Vbe of the PNP being exceeded?

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I agree. It is on the edge though. The 27R added to the output resistance of the driver gives a maximum gate drive current of ~207mA for a 12 V drive.

Is this placed so as to speed up the gate discharge of M1?

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I would like to review the maximum base current of the MMBT2907 before avoiding a base resistor for it. Do you agree

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The opposite. I guess it is for EMI reasons.
Probably the emitter resistor is for limiting the maximum base current as well. You might want to check datasheet.

the tying of the PNP (U3) collector to the sub-circuit common rail means the PNP can switch on faster?

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No. The PNP is connected to the source of the FET, and is the way it should be placed in the layout as well, close the the FET. The PNP will switch ON fast anyway because it is in the active region.

The typical Vbe zener breakdown voltage of silicon transistors is about 7V. No sure if it will be actually reached in the shown circuit.

I don't see a risk to exceed the 2907 base current.

the tying of the PNP (U3) collector to the sub-circuit common rail means the PNP can switch on faster?
No. The PNP is connected to the source of the FET, and is the way it should be placed in the layout as well, close the the FET. The PNP will switch ON fast anyway because it is in the active region.

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Thanks, but isnt there something about BJTs in common collector configuration?, they dont suffer as much with minority carriers getting trapped in their junctions and can switch faster?...ie compared to common emitter configuration.

I don't understand the question. There's no alternative for gate buffer transistor Q3. It can only be implemented as common collector. An yes, it's fast.