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How to measure dynamic power consumption of each component of a Microcontroller?

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qaziarbab

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I am interested to get the dynamic power consumption of each of the component of a micro-controller. Can I do it by adding the power lines in place and route (PAR)? The purpose of it to get the more precised power consumption of a MC. In simulation I can do it by several means, but what would be the effect of adding power lines to the chip? More importantly, is it possible practically , i.e measuring power of each component through power lines? What will be the power network distribution? Vdd distribution, etc?
Regards.
Qa
 

Your terminology is not clear to me. What is a 'component' of a microcontroller? A standard cell? A block? Either way, just look at the report power command of your tool of choice. There are many ways to report power hierarchically.
 

I already have got power report using X-Power Analyzer, I can see it hierachically. Component means, "FF", LUTs, Registers etc. How can I save them separately. And importantly, how this can be feasible and practical if the chip is fabricated. In simulation I can generate a power report, but how can one defend this practically? For some reasons I need to argue.
 

first, this is the ASIC section, not FPGA section.

second, no one cares if your flops or your logic is burning power. what matters is total power. this distinction is even less important for FPGAs where you program pre-existing blocks containing both logic and flops.

finally, the problem is ridiculously easy for FPGAs. there is a reason FPGAs are incredibly popular platforms... very easy to build prototypes and do all sorts of measurements you may ever need.
 

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