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Asynchronous FIFO cdc question

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Asynchronous fifo cdc question

For the following asynchronous FIFO, why rinc does not "AND" with !rempty ?

Screenshot extracted from sunburst asynchronous FIFO paper page 9

20BZr.png

There is alternative version that does not require the AND gate to generate the signal wclken. Could anyone elaborate ?

Screenshot extracted from sunburst asynchronous FIFO paper page 5

sis4c.png
 

Re: Asynchronous fifo cdc question

In FIFO style #1, the FIFO memory can be completely full, so an additional write will overwrite the oldest element.
If you write when the FIFO is full, the correct behavior is to ignore the write. It is not OK to destroy data that is already in the FIFO.
The AND gate prevents the overwrite.

A read will not destroy anything, so no need to AND the read signals. The logic inside "FIFO rptr & empty" will not increment the read pointer when the FIFO is empty.

In FIFO style #2 it is necessary to use "almost full" and "almost empty" signals. This means that there will be some slack, so a write when the FIFO is "almost full" will not destroy anything.
The memory in FIFO style #2 can never be completely full.
 

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