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[moved] Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence

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mehdinoormohammadi

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Hello,

I want to simulate a continuous time sigma delta modulator SNDR with Monte-Carlo simulation in Cadence and see the histogram of the SNDR so as to figure out how the device mismatches impact the modulator performance. I have the output bit stream of the modulator quantizer, I have no idea how to fed the output to the monte-carlo simulation and end-up with the histogram showing "#counts vs. SNDR". I would appreciate it if someone let me know how to do that.

Regards,
Mehdi
 

First of all, what do you mean by "in Cadence" ?
Use correct terminologies.

I have the output bit stream of the modulator quantizer,
I have no idea how to fed the output to the monte-carlo simulation and end-up with the histogram showing "#counts vs. SNDR".
Simply, SNDR at one input level.
 

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