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Understanding PCI express root complex

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spartekus

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Hi everyone,

I try to understand PCI express since hours. Can anyone help me understand some points.

- Do i have to use root complex? In which cases it is fine not to use root complex?

- There is a CPU, root complex, switch and endpoints. if one of the end point wants to communicate with other endpoint, it goes to root complex and root complex forward the message. What is the role of CPU in this process?

- What is exactly a root complex? is it a device to be programmed in C or it does everything by recpect to datas, sent to it? (Same question also for switch)

Thanks a lot
Best regards
 

Re: understanding PCI express root complex

thank you for your answer, this book is actually around 1000 pages, and only demo version is available which is 222 pages. I doubt my questions are in these 222 pages :/. I will try to find out in 1000 pages, but i need to learn it a bit fast.
 

Re: understanding PCI express root complex

Rootcomplex is an interface device. It connects the CPU to downward peripherals.
(similar to northbridge of earlier generation motherboards)

You can program it . But knowledge of device driver programming is required.

endpoint to endpoint communication is supervised by rootcomplex but it is finally the cpu that runs the show.
 

Re: understanding PCI express root complex

Hi Srizbf,

thanks for your answer, nice to see someone know about topic.
in which case i may not use root complex and do work only with switch?
driver programming should be done on CPU or on root complex?

i saw some messaging examples, message request and message delivery happens upon root complex

endpoint -> switch -> root complex -> memory, then it returns
memory -> root complex -> switch -> end point? therefore i asked what does CPU in such process?

thank you
 
Re: understanding PCI express root complex

In the messaging example from endpoint to memory and viceversa , the rootcomplex is in BusMasterMode.

This similar to DMA so no CPU is required.

driver is for rootcomplex and not for CPU.
 

Re: understanding PCI express root complex

thank you srizbf,
is root complex integriert into the CPU or there has to be an external chip except CPU?
greetings
 

Re: understanding PCI express root complex

Hi srizbf,

ich like to ask something about Switch. does it should be programmed? is it an fpga or cpu?
thanks

- - - Updated - - -

i meant, should it be programmed or just registers should be configured?
thank you
 

Re: understanding PCI express root complex

both integral in cpu or external module are possible for rootcomplex.

programming wrt pcie is cofiguring the registers for required mode.
 
Re: understanding PCI express root complex

programming wrt pcie is cofiguring the registers for required mode.

i am not sure, if i understood it correct. a pcie switch is a fpga or mcu?
or it is an IC and its registers should be configured by root complex?
 

Re: understanding PCI express root complex

pcie switch can be implemented by any one of the type ,fpga/mcu/ic.It is a switch for connecting any to any.

It is controlled by rootcomplex.
As said earlier rootcomplex is the supervisor. The rootcomplex configures it and let it go.
 
Re: understanding PCI express root complex

Hi Srizbf,

i didnt want to open new topic related to this.
Something confuses me still:
Transaction Layer -> data link layer -> physical layer. These should be programmed or they are already inside of device and do the adding and subtracting processes themselves automatically?
if they should be programmed? it should be done in kernel space righT?

Thank you so much.
Regards
 

Re: understanding PCI express root complex

Your question is too unspecific. PCIe hardware is controlled by system bios and OS kernel drivers. Depending on the application, you'll either write additional kernel drivers or perform only user mode IO calls.

What's your hard- and software environment?
 

Re: understanding PCI express root complex

linux environment, hardware is different.
a driver should be written, it is clear.

in the architecture of PCIe, there are some layers, such as, Transaction Layer -> data link layer -> physical layer.
At transmitter these layers add additional information to our data we want to transmit
at the receiver side, these layers subtract these informations.

I was wondering, if these layers are already in hardware, registers do these task automatically or we have to program it?
 

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