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EM extracted parasitics for your pad:
Pad capacitance to ground is 0.18pF, which is small compared to the varicap path.
Series inductance from "bottom side" to "diode side" is 0.6nH (per path).
You can go back to your "ideal" schematic, insert these parasitics and see if that is close to the EM results with pads.
I used an EM solver to simulate the pad and then converted S/Y/Z parameters to equivalent component values. My reference planes are at the outer edges of the pad.
As said, this is only to understand what physical effect in layout causes the difference in results between "ideal" and "with pad". You can put in only the shunt C (represent pad shunt cap) and check, and you can put in only the series L (representing pad series inductance) and check results, and this helps to understand how sensitive your circuit node is to layout effects (series inductance from path length, shunt capacitance from pad area). Then you can make layout changes to minimize that effect, and re-tune the rest of the filter to work with pad included.
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