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arithmetic addition for binary digits

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ashok12

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i am designing cdma encoder by using verilog code.

can you help me to design arithmetic adder with binary numbers for encoder.

0+0=0;
1+0=1;
0+1=1;
1+1=2; not 10
 

Still not clear... are you designing a specific signal called '2' or is is a number?
If it's a number, how do you represent it, does your encoder have a logic level to represent '2' ?

Brian.
 

sir

i have two data sequences like and arithmetic addition

encoded data chip1[3:0]d1 : 0101
encoded data chip2 [3:0]d2 :1100
multi bit [3:0] sum: 1201
 

Re: arithmetic addition for binary numbers

can you help for arithmetic addition with binary digits?

ex:0+0=0;
1+0=1;
0+1=1;
1+1=2; not 10

Addition of two binary digits will result in a sum binary digit in hardware. We humans may interpret 1+1=2; but for hardware logic it is 10.

Re posting the same Q with a different thread name won't help, unless you can explain your intention and problem in details.
 

Hi,
multi bit [3:0] sum: 1201
"2" is not a binary number. only "0" or "1" is allowed. You have to accept this.


Klaus
 

OK, so this is not arithmetic addition of binary digits at all. It seems you want to add the binary levels to produce an analog result. Binary can only have two levels, 0 and 1 but the diagram shows a third higher level. What you need is an analog adder not a binary one.

Brian.
 

This is an encoding scheme. The diagram dies not show a discrete binary value, but the values of the encoding over time. So two is just a value in time. This is not an addition problem, it's a decoding problem.
 

then what is the suggesting solution for that decoding problem
 

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