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Xilinx Power Analysis of BRAM with XPE

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Hello all,

I've been assigned to analysis someones power budgets for a Zynq device.

At a glance the person has the BRAM operating at 5W.

The model uses the following configuration
name - uram0/tdpram
block Rams - 256
mode - ram18 (this primative...is it 18 bits or 18kilo bits?)
toggle rate - 50%
clock - 400MHz
enable rate - 100%
bit width - 18 (data bus is 16, but 8 bits are parity i believe)
write mode - read first
write rate - 50%
(port B same)

My main concern is the block rams of 256
Is this actually equating to 256 * 18K bits?

Regards,
Wes
 

wesleytaylor said:
My main concern is the block rams of 256
Is this actually equating to 256 * 18K bits?

Regards,
Wes
Click to expand...
yes it's 256 18K-bit RAMs. FYI only a checkerboard or similar pattern is 50% toggle rate for RAM data.
 

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