Getting 'No feasible entries for subprogram' from questa sim

###### /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(312): 						lb_ref_func_v_r <= f_multR(signed(sign_x_pi_din) * cordic_cossin_oX, ffxp_correction_func_v_r, CAL_RRF_WL, CAL_RRF_FL, CAL_ANGLES_WL, CAL_ANGLES_FL);
# ** Error: /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(312): No feasible entries for subprogram "f_multR".
###### /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(313): 						lb_ref_func_v_i <= ffxp_Pxg.f_multR(signed(sign_x_pi_din) * cordic_cossin_oY, ffxp_correction_func_v_i, CAL_ANGLES_WL, CAL_ANGLES_FL, CAL_RRF_WL, CAL_RRF_FL);	
# ** Error: /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(313): (vcom-1136) Unknown identifier "ffxp_Pxg".
###### /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(317): 						lb_ref_func_h_r <= f_multR(signed(sign_x_pi_din) * cordic_cossin_oX, ffxp_correction_func_h_r, CAL_ANGLES_WL, CAL_ANGLES_FL, CAL_RRF_WL, CAL_RRF_FL);
# ** Error: /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(317): No feasible entries for subprogram "f_multR".
###### /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(318): 						lb_ref_func_h_i <= f_multR(signed(sign_x_pi_din) * cordic_cossin_oY, ffxp_correction_func_h_i, CAL_ANGLES_WL, CAL_ANGLES_FL, CAL_RRF_WL, CAL_RRF_FL);	
# ** Error: /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(318): No feasible entries for subprogram "f_multR".
###### /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(347): end architecture ; -- mixed	
# ** Error: /home/nbrummel/Documents/SWOT/cal/cal/cal_loopback_ref_func_dir/src/loopback_ref_func.vhd(347): VHDL Compiler exiting

   -- multiplication with requantization of the output
   function f_multR(A, B:unsigned; 
         AfxWL, AfxFL, BfxWL, BfxFL,
         CfxWL, CfxFL:natural) return unsigned;
   function f_multR(A, B:signed; 
         AfxWL, AfxFL, BfxWL, BfxFL,
         CfxWL, CfxFL:natural) return signed;
   -- versions which assume all inputs and outputs have the same widths
   function f_multR(A, B:unsigned; fxWL, fxFL:natural) return unsigned;
   function f_multR(A, B:signed; fxWL, fxFL:natural) return signed;

 function f_multR(A, B:unsigned; 
         AfxWL, AfxFL, BfxWL, BfxFL,
         CfxWL, CfxFL:natural) return unsigned is
      constant CSCL     : integer := AfxFL+BfxFL-CfxFL;
      variable prod     : unsigned(AfxWL+BfxWL-1 downto 0);
   begin
      -- Synplify creates a mess if the multiplier cannot
      -- fit into 4 DSP48s. That is, for an unsigned multiply,
      -- one of the inputs must less than 35 bits, and both
      -- must less than 49 bits
      assert AfxWL < 35 or BfxWL < 35 report "Need to use fw_multR (35)" severity warning; 
      assert AfxWL < 49 and BfxWL < 49 report "Need to use fw_multR (49)" severity warning;
      prod := A * B;
      if CSCL < 0 or CSCL+CfxWL > AfxWL+BfxWL then
         return f_requant(prod, AfxWL+BfxWL, AfxFL+BfxFL, CfxWL, CfxFL);
      else
         return prod(CfxWL+CSCL-1 downto CSCL);
      end if;
   end function f_multR;
   -- 
   function f_multR(A, B:signed; 
         AfxWL, AfxFL, BfxWL, BfxFL,
         CfxWL, CfxFL:natural) return signed is
      variable CSCL     : integer := AfxFL+BfxFL-CfxFL;
      variable prod     : signed(AfxWL+BfxWL-1 downto 0);
   begin
      -- Synplify creates a mess if the multiplier cannot
      -- fit into 4 DSP48s. That is, for a signed multiply,
      -- one of the inputs must less than 36 bits, and both
      -- must less than 50 bits
      assert AfxWL < 36 or BfxWL < 36 report "Need to use fw_multR (36)" severity warning; 
      assert AfxWL < 50 and BfxWL < 50 report "Need to use fw_multR (50)" severity warning;
      prod := A * B;
      if CSCL < 0 or CSCL+CfxWL > AfxWL+BfxWL then
         -- need to return bits outside the range of prod
         return f_requant(prod, AfxWL+BfxWL, AfxFL+BfxFL, CfxWL, CfxFL);
      else
         -- this will not necessarily return a result with the same
         -- sign as prod, if we are losing MSBs with data, but it
         -- matches the logic in f_requant.m
         return prod(CfxWL+CSCL-1 downto CSCL);
      end if;
   end function f_multR;
   -- Versions where inputs and outputs have the same size
   function f_multR(A, B:unsigned; fxWL, fxFL:natural) return unsigned is
      constant CSCL     : integer := fxFL;
      variable prod     : unsigned(2*fxWL-1 downto 0);
   begin
      assert fxWL < 35 report "Need to use fw_multR (35)" severity warning; 
      prod := A * B;
      return prod(fxWL+CSCL-1 downto CSCL); -- that is, (2*fxWL-1 downto fxWL)
   end function f_multR;
   -- 
   function f_multR(A, B:signed; fxWL, fxFL:natural) return signed is
      constant CSCL     : integer := fxFL;
      variable prod     : signed(2*fxWL-1 downto 0);
   begin
      assert fxWL < 36 report "Need to use fw_multR (36)" severity warning; 
      prod := A * B;
      return prod(fxWL+CSCL-1 downto CSCL); -- that is, (2*fxWL-1 downto fxWL)
   end function f_multR;

lb_ref_func_v_r <= f_multR(signed(sign_x_pi_din) * cordic_cossin_oX, ffxp_correction_func_v_r, CAL_RRF_WL, CAL_RRF_FL, CAL_ANGLES_WL, CAL_ANGLES_FL);