Do preferred language should be input HDL file in any FPGA design tools?

Hi all,

Have a Nice day...

In most of FPGA design tools (e.g. Xilinx ISE, Quartus IDE, Libero IDE/SoC), there is an option to chose preferred language either as VHDL or VERILOG. Sometimes, i open a project with preferred language as VHDL and import some VERILOG files and run the tool. It usually works fine without any errors. If the tool is working without any error when there is a conflict between preferred language and import files, why does that option exist, or does it affect the design in anyway???

Mixed language simulation is a costly add-on for Modelsim. Generating all IP in the "preferred language" can be necessary to perform RTL simulation.

The prefered language means any generated ip or templates should default to the prefered language. The tool itself has no problems with either language.

Mixed language simulation is a costly add-on for Modelsim. Generating all IP in the "preferred language" can be necessary to perform RTL simulation.

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The latest version of Modelsim Altera Edition can do mixed language simulation.

@TrickyDick, do you mean that the ModelSim Altera (free) version is able to do mixed language simulation for free?
I remember this being a very massive pain before when Altera had so much of their IP including reference designs written in Verilog and then the user had to write his/her design in VHDL and then this mixed language simulation license absence would create very big problems. Yes, it was expensive a few years ago when I checked it.

matrixofdynamism said:

@TrickyDick, do you mean that the ModelSim Altera (free) version is able to do mixed language simulation for free?
I remember this being a very massive pain before when Altera had so much of their IP including reference designs written in Verilog and then the user had to write his/her design in VHDL and then this mixed language simulation license absence would create very big problems. Yes, it was expensive a few years ago when I checked it.

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I think it's just the Altera Edition (paid for) rather than the free version. But this is still cheaper than a full version of modelsim.

The latest version of Modelsim Altera Edition can do mixed language simulation.

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Surprizing feature! Do you know since which Quartus version?

Actually, according to the Q15 page, the free version also supports mixed language

https://www.altera.com/products/design-software/model---simulation/modelsim-altera-software.html

Does ModelSim-Altera Edition software support dual-language simulation?
Yes. Starting with Quartus software v15.0, the Modelsim-Altera Edition software supports dual-language simulation. This includes designs that are written in a combination of Verilog, System Verilog, and VHDL languages, also known as mixed HDL.

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