rahdirs
Advanced Member level 1
Hi,
I need to calculate 3db power gain. The file uses unsigned library & i cannot change/add signed library as the file is being used by others as well.
I have the power values of the current frame & previous frame (s_power & s_power_d1). The power value is such that (actual value -> -3db, value in vhdl -> +30 ).
So, i have written it as
But the above code makes ch_3db_gain as '1' at both rising edge (eg: s_power = 60, s_power_d1 = 25 ) & falling edge (eg: s_power = 25 & s_power_d1 = 60). This is because of the unsigned library that is being used. How can i detect it only at rising edge ?
I've thought of modifying it in the following way but not sure if it will work. Will have to check in simulation.
I need to calculate 3db power gain. The file uses unsigned library & i cannot change/add signed library as the file is being used by others as well.
I have the power values of the current frame & previous frame (s_power & s_power_d1). The power value is such that (actual value -> -3db, value in vhdl -> +30 ).
So, i have written it as
Code VHDL - [expand] 1 2 3 4 5 if( (s_power - s_power_d1) >= 30) then ch_3db_gain <= '1'; else ch_3db_gain <= '0'; end if;
But the above code makes ch_3db_gain as '1' at both rising edge (eg: s_power = 60, s_power_d1 = 25 ) & falling edge (eg: s_power = 25 & s_power_d1 = 60). This is because of the unsigned library that is being used. How can i detect it only at rising edge ?
I've thought of modifying it in the following way but not sure if it will work. Will have to check in simulation.
Code VHDL - [expand] 1 2 3 4 5 if( (s_power > s_power_d1) and (s_power - s_power_d1) >= 30) then ch_3db_gain <= '1'; else ch_3db_gain <= '0'; end if;
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