A strange error message: ERROR: Anno:169

An strange error message : ERROR:Anno:169

Hello,

I encountered an strange error during the post-place and route simulation of my design that I would like to share it here for a possible solution.

I have a design that one of its parts is operating at high frequency and the rest at low frequency.
I used the IBUFG buffer to buffer the input clock signal and the output of this IBUFG buffer goes to:
1. A PLL to generate a higher frequency
and
2. directly connected to the clock input of the module that is operating at low frequency.

Then I synthesized, translated, mapped and Place-and-routed the design and the generated bit file was downloaded to the FPGA and via UART comunication I can communicate with the design.

I wanted to do a post-place-and-route simulation to see the behavior of desgn but I received the following error message in mapping process :


Can anybody let me know where could be the problem that prevents the simulation? I have to mention that the Behavioral and post-translate simulations are performed correctly !

Remark: Is it related to the branch taken from the output of IBUFG?? I just conjectured it !

Any kind assistance is cordially appreciated,

Regards,

Re: An strange error message : ERROR:Anno:169

Is that the only information on the problem, because it's not even telling you what bel type is having the problem. Did you not clip out the warning/errors prior to this ERROR? Most of the time stuff like this shows up much later than the actual problem and is a result of the first issue.

And your conjecture its due to the IBUFG is unlikely I've done stuff like that many times and it's not a problem with simulation pre or post PnR. The tools will add a BUFG to the net and that should also show up in the simulation netlist along with the appropriate SDF annotations.

Re: An strange error message : ERROR:Anno:169

ads-ee said:

Is that the only information on the problem, because it's not even telling you what bel type is having the problem. Did you not clip out the warning/errors prior to this ERROR? Most of the time stuff like this shows up much later than the actual problem and is a result of the first issue.

And your conjecture its due to the IBUFG is unlikely I've done stuff like that many times and it's not a problem with simulation pre or post PnR. The tools will add a BUFG to the net and that should also show up in the simulation netlist along with the appropriate SDF annotations.

Click to expand...

Thanks for your reply @ads-ee,

Here is the only information provided by the Post place and route annotation....and nothing else...