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ADMA on SD Host Controller

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ismailov-e

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Hi everybody!!
I am writing ADMA FSM in SD Host Controller.
The Host Controller has ADMA System Address that uses as a pointer for Descriptor table of System Memory.
s3.png
In specification they are explained that one descriptor line consumes 64-bit
(8-byte) memory space, 63-32 is address; 31-16 is length; 15-6 is reserved; and other bits is attribute.
s5.png
The ADMA System Address also 64 bit register. I though that driver puts one descriptor line 64-bit to ADMA System Address 64-bit.
s14.png
I little bit confused, because in explanation of ADMA System Address they wrote that 32-bit Address Descriptor uses lower 32-bit of this register and The ADMA increments this register address, which points to next line, when every fetching a Descriptor line.
s7.png

So I have many questions but I would ask few of them:
1.Does the Host Controller interrupts for every executed Descriptor line?
2.If first 32 bits of ADMA Syst. reg. is for address, what is other bits for?
3.Does the ADMA on host controller increments the address after executing one Descriptor line?
4.Does the addresses of Descriptor table is address to write/read data?
 

Guys it seems I understood:
The driver puts initial address to the ADMA System Address to point the initial line of descriptor.
The Host Controller using those address from the ADMA System Address directly gets a descriptor from the system memory and increment an address to take a next descriptor line.
 

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