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How to transfer data packets from ZYNQ to DDR3 memory available on ZedBoard ? Is it possible to do this task without involving the Zynq processing system ?
There is the DDR controller (the MIG) that interfaces the DDR3 memory. It can be generated either to have an AXI4 i/f or an User i/f. If you have a logic through which you can drive the signals of the AXI or User i/f that can initiate write/read transactions, then just go ahead and do it.
btw- you didn't mention the source of your data packets, is it generated on the zync (perhaps by some other logic blocks) or is it coming from some external source/s?
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