Christian Chetcuti
Junior Member level 3
I am trying to multiply 2 sine waves and then transfer the result to a DAC converter. The screenshot below shows the schematic.
The divider is built using the clocking wizard core to get the 100Mhz system clock down to 50Mhz. Next comes the sine wave generators which were built usind the DDS Compiler 4.0. The multiplier was built using the multiplication block (Math function core) and next comes the PMOD DA2 reference component.
After setting up the ports, and clicked on generating programming files this warning comes up:
Do you have any idea how to fix this ?
The divider is built using the clocking wizard core to get the 100Mhz system clock down to 50Mhz. Next comes the sine wave generators which were built usind the DDS Compiler 4.0. The multiplier was built using the multiplication block (Math function core) and next comes the PMOD DA2 reference component.
After setting up the ports, and clicked on generating programming files this warning comes up:
WARNINGhysDesignRules:2410 - This design is using one or more 9K Block RAMs
(RAMB8BWER). 9K Block RAM initialization data, both user defined and
default, may be incorrect and should not be used. For more information,
please reference Xilinx Answer Record 39999.
Do you have any idea how to fix this ?
