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SoC cores and ic level cores?

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deepen talati

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At SoC level, our main chip makes a system with interfacing standards,memories,graphics..etc... Are these component called cores?
In that chip can there be other cores? I am really confused about cores. In SoC,in our main design can there be reusable design whom are we wrapp by IEEE 1500?
Pls explain.
 

SOC means for me multiple programmable indenpendant cores (DSP or processors) in same chip.
 
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    sdram

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SoC IP means, a computation unit which performs own function with the integration of other components in the system. An IP can perform alone or within a whole system. If you make a calculation unit in your design (may be a simple calculator) you can call that an IP core and it can be reused (if it is reusable).
In SoC,in our main design can there be reusable design whom are we wrapp by IEEE 1500?
Click to expand...
Can you elaborate this statement?
 
I am asking that, in our SoC there will be many cores. Ok? We wrap up those cores by IEEE 1500 standard for testing various cases.
My question is can each of those core have sub-cores?

Ans our SoC will be placed on 1 PCB. On that PCB there can be sub-system modules. And those modules also may contain some cores.
So are we wrapping up those sub-systems or cores inside the sub-system?
 

deepen talati said:
I am asking that, in our SoC there will be many cores. Ok? We wrap up those cores by IEEE 1500 standard for testing various cases.
My question is can each of those core have sub-cores?

Ans our SoC will be placed on 1 PCB. On that PCB there can be sub-system modules. And those modules also may contain some cores.
So are we wrapping up those sub-systems or cores inside the sub-system?
Click to expand...

Hi,

1) in an SoC there may be many cores... A core may have many functional units... these units depend on each others operations... But a core can work as a standalone device...

and i can't understnd your 2nd question... If you place your SoC on a PCB means you are not going to wrap these things.. you are just going to interface your SoC(IP cores) with other cores or Other SoC..

Thanks...
 

Thank you......
I was confused that are we wrapp up cores and functional units both by hierarchy?
So, we only wrap the cores which lies on 1 SoC.
Other Function units inside that core will be tested by other DFT features like scan chain....
 

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