Minimalist Altera Cyclone eval board

I was looking for the minimum requirements to operate an Altera Cyclone EP1C3T100 and came across this old thread
https://www.edaboard.com/threads/132812/
which had no reply.

I have the same problem here. I have breadboarded an EP1C3T100 the best I could, with the 3.3V, 1.5V and ground going to what I believe are the right places based on the Altera data sheet (I will post a schematic later), an oscillator, no configuration device at the moment, just the config pins set to fixed levels so that the chip *should* be idle (not trying to configure itself).
The chip is drawing over 100mA on the 1.5V and that seems excessive. The Altera FAE said it should be more like 30mA.

I need help in the form of a minimum schematic to bring the chip us with the JTAG and an LED (blinky).

Ant recommendation appreciated. I will try to draw a clean schematic of what I have later today and post it.

TIA

Didier

I can't speak for Altera parts, but one possibility is that unused pins are configured as (digital) inputs, and if these are left floating they can consume a lot of current. There may be a pin that pulls up unused pins (on Xilinx FPGAs it's HSWAPEN). Alternatively, you could load a configuration file that configures pull-ups or sets the unused pins to outputs.