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How to design/calculate a PLL with SPD?

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vagarwal

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PLL with SPD

Hi All,

I am doing a PLL (s-Band spot frequency), using SPD from metelics. I have tried to search about this approach, but everytime I land up with the details of "divide by N" type PLL. I then tried to calculate my loop filter using some analogy, but the values that appear are so low for capacitors and so high for resistors that the circuit doesn't work. Can anyone please throw some light on how do I go about the design of this PLL - specially the expected outputs of SPD and loop filter. Also please guide me about the loop filter topology and calculations of this type of PLL.

Serious help required.

Thanks and regards.
 

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