swapan
Full Member level 4
Friends,
I am trying to modulate pulse width of an UPS based upon load connected to it. I mean to say, load current is checked by one ADC. The voltage developed across shunt for load current sensing is so designed that it will read 0.7V at full load. 0.7V corresponds to a decimal value of approximately 35 when converted to digital taking Vref of ADC as Vdd (255x.7/5). For varying width of pulse, a counter has been used which is loaded with lateral 35 for maximum pulse width and lower ones for lower widths. This is the conception of my project.
Now I like to take samples of load current at regular intervals and converting it to digital the converted value place in the counter for necessary modulation of pulse width. The more is load current, the more pulse width and vise-versa. Thus stable output will be maintained throughout no load to full load.
But I am facing problem in this way. If the converted AD value is placed to the counter, frequency is dropped to 1/4th whereas if a literal of 35 is placed, everything is ok. Please see a small code and let me know if this is possible.
Regards.
swapan
I am trying to modulate pulse width of an UPS based upon load connected to it. I mean to say, load current is checked by one ADC. The voltage developed across shunt for load current sensing is so designed that it will read 0.7V at full load. 0.7V corresponds to a decimal value of approximately 35 when converted to digital taking Vref of ADC as Vdd (255x.7/5). For varying width of pulse, a counter has been used which is loaded with lateral 35 for maximum pulse width and lower ones for lower widths. This is the conception of my project.
Now I like to take samples of load current at regular intervals and converting it to digital the converted value place in the counter for necessary modulation of pulse width. The more is load current, the more pulse width and vise-versa. Thus stable output will be maintained throughout no load to full load.
But I am facing problem in this way. If the converted AD value is placed to the counter, frequency is dropped to 1/4th whereas if a literal of 35 is placed, everything is ok. Please see a small code and let me know if this is possible.
Regards.
swapan
Code:
PWM:
btfsc switch ; Check Inv. switch ON/OFF.
goto inv_off
bsf chanel1 ; Channel A set to high
call delay_fxd ; Fixed pulse width of 5 ms.
Call delay_var ; Variable delay.
movlw b'10011001' ; Take sample of load current
movwf ADCON0
call delay_3
bsf ADCON0,GO
btfsc ADCON0,GO
goto $-1
movlw d’35’ ; Check if AD value of load current is
subwf ADRES,W ; less than maximum i.e. d’35’.
btfsc STATUS,C
goto loop_1
clrf count1
movf ADRES,W
movwf count1 ; If it is less that 35, place it to count1.
goto loop_11
loop_1:
clrf count1
movlw d'35' ; If it is more that maximum, place the maximum
movwf count1 ; allowable count i.e. d’35’ to count1.
loop_11:
bcf chanel1 ; Channel A set to Low.
Call delay_TMR ; This is the TMR0 used as 5 ms interrupt.
btfsc switch ; Check Inv. switch ON/OFF.
goto inv_off
bsf chanel2 ; Channel B set to high
call delay_fxd ; Fixed pulse width of 5 ms.
Call delay_var ; Variable delay
movlw b'10011001' ; Take sample of load current
movwf ADCON0
call delay_3
bsf ADCON0,GO
btfsc ADCON0,GO
goto $-1
movlw d’35’ ; Check if AD value of load current is
subwf ADRES,W ; less than maximum i.e. d’35’.
btfsc STATUS,C
goto loop_2
clrf count1
movf ADRES,W
movwf count1 ; If it is less that 35, place it to count1.
goto loop_22
loop_2:
clrf count1
movlw d'35' ; If it is more that maximum, place the maximum
movwf count1 ; allowable count i.e. d’35’ to count1.
loop_22:
bcf chanel2 ; Channel B set to Low.
Call delay_TMR ; This is the TMR0 used as 5 ms interrupt.
goto PWM
delay_var:
movf count1,W
movwf count2
decfsz count2,1
goto $-1
return