Pls Help --Bidriectional port Verilog

im trying to write a code to charge the capacitor on the an IR sensor and see the discharge time on a oscilloscope

im using a pwm to charge the capacitor but i have to be able to change my output pin to an input pin after 10ms to see the discharge.

this is my code but i keep getting errors . i cant figure out wats wrong. Pls help me Thank you


module sense( clock,pwm,
);



parameter d = 195;

parameter cs = 100000;

parameter sw = 4;

input clock;

inout pwm;



reg [15:0] counter = 0;
wire pwm;


wire pwm_out;


assign pwm = (pwm_out==1) ? 1'bz :1'bz; // trying to change to input

always @(posedge clock)



begin // PWM generation
counter = counter+1; // Increment counter
if(counter <= sw*d) pwm <= 1;
else pwm_out <= 0;
if (counter >=cs) counter = 0; // Resets the counter




end

endmodule

In a clocked process, you can only assign values to registers, not wires.

You have a continuous assignment for pwm (assign pwm = (pwm_out...) but you also try to drive pwm with if (counter <= sw*d) pwm <= 1;

I presume this should have been setting pwm_out to 1, not pwm to 1. However this won't work because pwm_out is a wire. You should declare it as type reg.

Your continuous assignment for pwm doesn't actually make sense because it will be 'z' no matter what pwm_out is. It should probably be 1'b1 when it's an output and 1'bz when it's an input, if your PWM involves driving it between 1 and z rather than 1 and 0.