michaeljackson
Newbie level 5
Hi all,
I designed some I/O and passed ESD test. But customer asks me to lower rise/fall time of voltage output for reducing EMI. I donot know how to do with it . Firstly I think I can segment output driver of IO pad, but it seems it is not very useful.
Can anybody show me how to do with pad design? Thank you very much. Or show me some paper, then I can refer it.
I designed some I/O and passed ESD test. But customer asks me to lower rise/fall time of voltage output for reducing EMI. I donot know how to do with it . Firstly I think I can segment output driver of IO pad, but it seems it is not very useful.
Can anybody show me how to do with pad design? Thank you very much. Or show me some paper, then I can refer it.