koralgolek
Newbie level 1
Here is the part of dso nano's configuration - TIM1 configuration:
Can somebody explain me the conception of this configuration - in other words - how does it work? I know only that period of events occuring = (PSC+1)x(ARR+1)/ (72MHz)
Maybe it's very simple but I'm confused. I rewrited this line - TIM1->DIER =0x4200; - to more understandable format
What is the difference between TIM_DIER_UDE and TIM_DIER_TDE and what they do?
Code:
TIM1->PSC = 15;
TIM1->ARR = 35;
TIM1->CCR1 = (35+1)/2;
TIM1->CR1 = 0x0094;/*0000 0000 1001 0100
|||| |||| |||| |||+---CEN=0
|||| |||| |||| ||+----UDIS=0
|||| |||| |||| |+-----URS=1
|||| |||| |||| +------OPM=0
|||| |||| |||+--------DIR=1
|||| |||| |++---------CMS=00
|||| |||| +-----------ARPE=1
|||| ||++-------------CKD=00
++++-++---------------Reserved*/
TIM1->RCR = 0x0000;/*0000 0000 0000 0001 Repetition counter register
|||| |||| ++++ ++++---Repetition Counter Value=1
++++-++++-------------Reserved*/
TIM1->CCER =0x0001;/*0000 0000 0000 0001
|||| |||| |||| |||+---CC1E=1
|||| |||| |||| ||+----CC1P=0
|||| |||| |||| |+-----CC1NE=0
|||| |||| |||| +------CC1NP=0
++++-++++-++++--------Reset value*/
TIM1->CCMR1=0x0078;/*0000 0000 0111 1100
|||| |||| |||| ||++---CC1S=00
|||| |||| |||| |+-----OC1FE=1
|||| |||| |||| +------OC1PE=1
|||| |||| |+++--------0C1M=111
|||| |||| +-----------OC1CE=0
++++-++++-------------Reset value*/
TIM1->BDTR =0x8000;/*1000 0000 0000 0000
|+++-++++-++++-++++---Reset value
+---------------------MOE=0*/
/*
TIM1->DIER =0x4200;0100 0011 0000 0000 DMA/Interrupt enable register
| || +----CC1IE=0
| |+-------------UDE=1
| +--------------CC1DE=1
+--------------------TDE=1
*/
TIM1->CR1 |=0x0001;//CEN=1, TIMER1 Enable
Can somebody explain me the conception of this configuration - in other words - how does it work? I know only that period of events occuring = (PSC+1)x(ARR+1)/ (72MHz)
Maybe it's very simple but I'm confused. I rewrited this line - TIM1->DIER =0x4200; - to more understandable format
Code:
TIM1->DIER = TIM_DIER_CC1IE;
TIM1->DIER = TIM_DIER_UDE; ( Update DMA request enabled)
TIM1->DIER = TIM_DIER_TDE; (Trigger DMA request enabled)
What is the difference between TIM_DIER_UDE and TIM_DIER_TDE and what they do?
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