cnspy
Full Member level 3
set_input_delay
In DC, set_input_delay used in seqential design. it set the delay of input ports from clock.
But in the combinational design. which is the reference timing port for the delay calculating?
Thanks in advance.
In DC, set_input_delay used in seqential design. it set the delay of input ports from clock.
But in the combinational design. which is the reference timing port for the delay calculating?
Thanks in advance.