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[ispLever] unable to create the hierarchy...

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davorin

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Trying to synthesize OpenRisc on ispLever 4.1 it always complains about "unability to create hierarchy" when importing the Verilog files from or1200...

Something ispLever Base 4.1 is more strict about Verilog code?
 

the synthesizer within ispLevel 4.1 is Synplicity's Synplify 7.6a and Mentor's Leonardo Specctrm.Which one you chose?
and you can try synthesize or1200 with standalone Synplify.
by the way,the ver 4.1 of ispLevel is too big: at least 2G harddisk space needed for install.
 

leonqin said:
the synthesizer within ispLevel 4.1 is Synplicity's Synplify 7.6a and Mentor's Leonardo Specctrm.Which one you chose?
Click to expand...

How should this affect the import of files into a project?
It doesn't call Synplify during this...(same behaviour for both tools)


...and...2GB today is nothing (o;
 

look log ,you will find which one was chosen
 

Ehhmm..I know which one was choosen and I said above that I tried both version...

But importing Verilog files into a new project doesn't call any synthesize tool..so why should I bother looking into Synplify/Leonardo?
 

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