tank quality factor & passive mixer input impedance measurment

Does any body know how to measure the lc tank quality factor with software(rf spectre .i.e cadence) and by calculations too?
is it possible to get 900 ohm impedance of an lc tank ?(this lc tank was used for an lna load.)( l=5.49nH , c=651fF).the lna has a dc blocking cap of 2pF value after the tank.
what is the relation between the impedance, l and c of a tank( i mean the formula of them)?
how can i measure the input impedance of a passive mixer by tran analysis in rf spectre?
please some body explain the above questions answers completely for me?
TANK YOU.

Q = 2 X pi X L/R or centre frequency/delta bandwidth (3dBpoints).
Frank

how can i measure the input impedance of a passive mixer by tran analysis in rf spectre?

Click to expand...

For Finding the Input impedance of Passive Mixer, you should use PSS+PAC simulation.

how to measure the lc tank quality factor with software(rf spectre .i.e cadence) and by calculations too?

Click to expand...

Q=Rp*sqrt(C/L) for a parallel combination of RLC.

For your Case Rp=900 ohms and then the Required Q=9.8. This means that the Q of your Inductor should be 9.8 which may difficult on chip. Therefore, if you really need 900 ohms, you should scale up the inductor and scale down the capacitor by the same factor. Here is an example derived from you data. Assume that you are limited by Q=6. Rp=L*w*Q , from your data w=2.66GHz=1/(2*pi*sqrt(l*c)). L will be equal to 9nH and C is equal to 400fF. Also using 2pF floating cap for ac coupling purposes increases the parasitic caps. Maybe, you can decrease it.

For finding the Q of inductor in cadence, just use one inverter in parallel with AC current source and do AC simulation and then Q= Imaginary part of voltage on the inductor/Real part of voltage on the inductor.

thank you for your answers.
can you explain more about the testbench of passive mixer for this(input impedance simulation) by pss+pac. how do i have to do it? what is the conditions of lo and rf ports in this simulation. are the lo port grounded? and what is the pss+pac windows conditions?
I am sorry.I had a mistake. the 900ohm was my lna output impedance and my frequency is 2.4G.I have changed the l &c of my lc(not rlc) tank to 3.62nH and 890fF respectively.the output impedance of my cascode common source lna is 500 ohm now but the q decreases a little. how much value of q is practical for on chip implimentation of lc tank.you consider this problem that i have too small area for my lna, on chip.(.21mm2 for an lna with 12nH, 3.6nH , .8nH , caps and three lare transistors and two i and q mixers i.e. the whole of front-end!!)is it possible to implement all of them in such an small area?!