To design high speed circuit, what should I do with size(w/l ratio)?

Measuring a speed and current

I am doing layout with MAGIC, and simulation with H-SPICE.
I know that a current increases as a width increases, then how do I measure a speed and current of '4-bit ripple carry adder'?
Especially, I'd like to know which part of the adder gets higher current. (Which part should I measure?)
I need very specific instruction on this. Please help!..

you size the devices to get the desired performance. without giving any details (what circuit, what speed, which technology, etc) this is the only answer anyone can give.

The raw speed of a CMOS circuit depends more on fanout
than raw size, if it's all close-in (minimal long-wire loading).
Changing from a base (say) W=1um to a W=10um across
the whole cell library means you are increasing fanin load
at the same rate as you increase the ability to drive it,
for a net wash in delay but additional power wasted. Only
the wireload element of delay will improve.

A block as you describe ought to have wireloads less than
gate loads I expect. If you are really interested in custom
digital design and driving it to its minimum delay, that would
mean running all the combinations, determining critical path
and shaving on that until it is no longer critical, lather, rinse,
repeat until you have met spec (if any) or run out of patience.

Attacking it with global approaches, is not going to get you
all the way to "best". If you have a spec then at least you
can quit at "good enough" (plus margin).