Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

implementation of median filtering of an image on fpga

Status
Not open for further replies.
S

saladianoop

Newbie level 2
Joined
Mar 25, 2010
Messages
2
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,291
hi..i am working on median filtering of an image using 3*3 window.how can i read the pixel values from a bin file in VHDL and how to write back the output pixel values to a file?? is there any sample code showing all this??desperately in need of vhdl code for this....
Pls help
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top