Adam.Yakuvitz
Member level 3
Hello,
We are trying to do some ASIC prototyping targetted for FPGA. We are using Synopsys Design Compiler (DC). DC takes only .lib and not simprims/uniprims. Are there Synopsys .lib models available for Xilinx or Altera parts (spartan or virtex)?
thanks
-- ay
We are trying to do some ASIC prototyping targetted for FPGA. We are using Synopsys Design Compiler (DC). DC takes only .lib and not simprims/uniprims. Are there Synopsys .lib models available for Xilinx or Altera parts (spartan or virtex)?
thanks
-- ay