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Problem Using Dsp tools software(Acel dsp)

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BAT_MAN

BAT_MAN

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I am using Dsp tools software to convert matlab code into vhdl ,but the problem is that i get an error when i verify the code converted into fixed point form. Please can anyone guide me how to use Dsp tools software correctly so that my Matlab code is sysntesized easily so that it could be burned into FPGA.

Thanx
 

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