money_kandan2004
Member level 3
hai,
Now iam doing M.E ( Applied Electronics ).
Iam in project phase.
My project name is " Area Efficient FIR filters for High speed FPGA Implementation "
In these Project it has Reduced Slice Graph (RSG) Algorithm was used. But the clear information is not given about this RSG algorithm.
I need clear idea about RSG algorithm with some examples.
This is IEEE paper project. It's very urgent.
Pl. any one have this RSG algorithm details.
Pl. send as early as possible.
Advance thanks.
Now iam doing M.E ( Applied Electronics ).
Iam in project phase.
My project name is " Area Efficient FIR filters for High speed FPGA Implementation "
In these Project it has Reduced Slice Graph (RSG) Algorithm was used. But the clear information is not given about this RSG algorithm.
I need clear idea about RSG algorithm with some examples.
This is IEEE paper project. It's very urgent.
Pl. any one have this RSG algorithm details.
Pl. send as early as possible.
Advance thanks.
