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SignalTap waiting for clock

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hareeshP

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Hi all,
I'm using Altera SignalTap for monitoring the pins of fpga. We have two clock one for fpga which is 20MHz and another one is a 50MHz clock(we call it ifc clock) which coming from processor. Some registers are initialized based on the rising_edge of ifc clock and the register transmission happens. I have configured signaltap for monitoring the register values, and i have used the ifc clock as sampling clock. When run the analysis it showing like "waiting for clock".


Could anyone help me?

Thanks and regards
Hareesh.
 

If you have waiting for clock, then the clock you assigned isn't running. Are you sure you connected it to the correct clock?
 

If you have waiting for clock, then the clock you assigned isn't running. Are you sure you connected it to the correct clock?

it is running, and i verified with oscilloscope also.
 

That doesnt confirm that you connected signaltap to the correct clock when you set it up.
 

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