moro
Member level 3
Some advices in acurracy for a frequency counter using a spartan 6 fpga
Hello all,
i am trying to build up a counter for measuring high frequency signals less than 30MHZ.
For this ideea i was thinking of using a "reference clock" using a 10mhz ocxo trough a PLL to feed 100mhz at the fpga clock input.
On my fpga i will declare a 32bit counter, clocked at 100mhz (10ns/count)... and set to overflow at 20 000 000 counts.
On the "measured freq input" eveytime its detected a rising edge, i will store the current cnt value till the next rising edge... and do a "delta" to extract the measured period.
Is this feasable?
Thanks
Hello all,
i am trying to build up a counter for measuring high frequency signals less than 30MHZ.
For this ideea i was thinking of using a "reference clock" using a 10mhz ocxo trough a PLL to feed 100mhz at the fpga clock input.
On my fpga i will declare a 32bit counter, clocked at 100mhz (10ns/count)... and set to overflow at 20 000 000 counts.
On the "measured freq input" eveytime its detected a rising edge, i will store the current cnt value till the next rising edge... and do a "delta" to extract the measured period.
Is this feasable?
Thanks