SAMIRAZ
Newbie
Hi ,
At the moment I am trying to perform parasitic extraction using PVS-Quantus to get the RLC parasitics of the metal stack (routing).
the Pcell of my the transistor already includes RLC parasitics , I want this part of the layout to be blocked from parasitic extraction to avoid parasitics double counting
To do that :
• I preserved the Pcell during PVS LVS using preserve_cell_list in PVL.
• Then I introduced the cell to be blocked which is the Pcell to PVS Quantus tool in a txt file as pcellname_CDNS* .
checking fT and fmax of the transitor I can see that there is parasitics double counting (10-15% degradation).
any idea how solve this issue ?
Br.
At the moment I am trying to perform parasitic extraction using PVS-Quantus to get the RLC parasitics of the metal stack (routing).
the Pcell of my the transistor already includes RLC parasitics , I want this part of the layout to be blocked from parasitic extraction to avoid parasitics double counting
To do that :
• I preserved the Pcell during PVS LVS using preserve_cell_list in PVL.
• Then I introduced the cell to be blocked which is the Pcell to PVS Quantus tool in a txt file as pcellname_CDNS* .
checking fT and fmax of the transitor I can see that there is parasitics double counting (10-15% degradation).
any idea how solve this issue ?
Br.