AbinayaSivam
Member level 1
Hi,
I am new to HDL language. I have written and compiled the basic Counter Verilog code. But i need store 32 bit counter values as 4 8-bit registers ? Please someone help me.
I am new to HDL language. I have written and compiled the basic Counter Verilog code. But i need store 32 bit counter values as 4 8-bit registers ? Please someone help me.
Code:
module counter
#(parameter WIDTH=8)
(
input clk, enable, rst_n,
output reg [WIDTH-1:0] count
);
always @ (posedge clk or negedge rst_n)
begin
if (~rst_n)
count <= 0;
else if (enable == 1'b1)
count <= count + 1;
end
endmodule