Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Why we need two D flip-flops in a flip flip based divider by 2?

Status
Not open for further replies.
M

Meihdi

Newbie level 4
Joined
Jun 16, 2007
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,333
Hello All,

I have questions about the flip flop based divider by 2. There are two D flip-flop.
Is one D flip-flop not enough? What is the purpose of the second flip-flop?
Thanks for your help.
 

Re: Divider by 2

One ff can store only one bit, so you have 0 and 1. When you devide 0 or 1 with two, you will get only 0. So the second ff is to have two bits representing decimal numbers from 0 to 4. So in this case when you devide 2 with 2 you will get 1... The number of ffs depends of number of bits your number can have.
If you add 10 ffs, you will be able to devide 1024decimal.
(11111111 : 2 = 0111111111)
 

Re: Divider by 2

Hi the_edge,

I am Newbie in electronics.
I think my previous post was not really clear. Please let me clarify.
In fact, I would like to divide the frequency of an input signal using a flip-flop based divider by 2. I would have expected that one D flip-flop is not enough. So I do not exactly understand the purpose of the second D flip-flop....
 

Re: Divider by 2

the idea of dividing the clock by 2 goes this way........
they have 2 FF in series and they feed the clock to the FFs and the output of the 2 FFs are ANDed since there is a finite time delay between the outputs of the 2 FFs it results in clock division by 2.......
 

Divider by 2

I think only one flip-flop is enough.If the input to D is 1 then the output q toggles with half the initial clock frequency.
 

Re: Divider by 2

neil arm strong has said that

I think only one flip-flop is enough.If the input to D is 1 then the output q toggles with half the initial clock frequency.
Click to expand...

but if we give 1 as input to a D flip-flop then the output q stays 1 itself and i dont understand his design logic......

neil armstrong can u explain ur design with a circuit.......
 

Re: Divider by 2

Its a T flip flop... a single T flip fliop is enough for a divide by 2...
 

Divider by 2

One D-flop, with Q_NOT connected to D, will divide the clock frequency by two.

Can you show us the mysterious two-flop circuit? Maybe it does something more than divide by 2.
 

Re: Divider by 2

I think my previous post was not really clear. Please let me clarify
Click to expand...

OK sorry I didnt realised that you wanted clock devider...

Only one Dff is enough to devide by 2, so it would be good to upload that circuit so I could help you. I need to see how it is connected.



It just came to my mind, maybe what you have there is a master-slave configuration of two D latches?
 

Re: Divider by 2

only one DFF is enough, you can connect the DFF's negative output to

its D inputs.

best regards




Meihdi said:
Hello All,

I have questions about the flip flop based divider by 2. There are two D flip-flop.
Is one D flip-flop not enough? What is the purpose of the second flip-flop?
Thanks for your help.
Click to expand...
 

Re: Divider by 2

usually one flip flop for dividing the frequency is sufficient. two flip flops are mainly used to generate quadrature signals, that means you can not only divide the frequency but also generate two signals with 90 degrees phase offset. you can have a look at RF Microelectronics from Razavi for more details.

hope this helps.

funster said:
only one DFF is enough, you can connect the DFF's negative output to

its D inputs.

best regards




Meihdi said:
Hello All,

I have questions about the flip flop based divider by 2. There are two D flip-flop.
Is one D flip-flop not enough? What is the purpose of the second flip-flop?
Thanks for your help.
Click to expand...
Click to expand...
 

Re: Divider by 2

Meihdi,
If you connect the Qbar output af a D flip-flop to the D input, the output frequency will be 1/2 the input clock frequency. If this is all you need to do, then a 2nd flip flop is not necessary.
Regards,
Kral
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top